Ball-grid-array (BGA) packages are commonly used in electronics to minimize circuit board area for a given circuit functionality. This is achieved by using the entire area under the package to create an array of I/O connections using pre-attached solder balls. BGA packages are also very suitable for high-volume production because automated pick-and-place machines can handle them and they are attached to the next higher level of assembly printed circuit board using solder re-flow methods.
Ceramics are the materials most often used to build high-frequency BGA packages. Alumina, high-temperature co-fired (HTCC) ceramics, and low-temperature co-fired (LTCC) ceramics are examples of different ceramic materials that can be used in designing such packages. The main problem with ceramic materials is that the coefficient of thermal expansion (CTE) of most of the ceramic materials is significantly different from the CTE of nearly all polymer and polymer-composite laminate printed circuit boards to which the package would be attached in a subsequent higher level assembly. This poses a difficulty in mounting large ceramic BGA packages on host Printed Circuit Boards (PCBs) constructed using laminate materials, because standard size ball contacts nearly always develop cracks after thermal cycling unless additional precautions such as underfill are used. These cracks eventually result in open-circuit failure by disconnection of the signal lines. In addition, the most commonly used LTCC ceramic materials employ thick film processes that limit the minimum line width and gaps that can be manufactured. Finally, it is not easy to combine different ceramic materials having different dielectric constants into a functioning multilayer substrate, as would be desirable in the design of an RF or millimeter-wave package. BGA packages are extensively addressed in the literature.
U.S. Pat. No. 6,034,427 to James J. D. Lan, et al., describes a typical BGA package suitable for integrated circuit (IC) packaging. In Lan et al., the BGA balls are placed on micro filled via holes to optimize the BGA area. The IC can be placed in a cavity up or cavity down position and it is encapsulated using a glob-top approach. The connections between the IC and the BGA connections are achieved using wire-bonds. However, Lan et al.'s technology is not suitable for packaging millimeter-wave circuits because using glob-top to cover the IC can deteriorate electrical performance due to the relatively high dielectric loss tangent of the glob-top materials. In addition, the difference between the dielectric constants of the glob-top material and the substrate material that carries the transmission lines causes the isolation between the transmission lines to deteriorate. Lan, et al., also describes placing the BGA balls directly on top of the via holes.
U.S. Pat. No. 5,939,778 to Lynda Boutin et al. describes an integrated circuit chip package. However, Boutin et al., like Lan et al., only address the issue of encapsulating integrated circuits using transfer molding to prevent damage. The difficulties of using plastic materials to encapsulate millimeter-wave circuitry are described above.
U.S. Pat. No. 6,228,468 to Nagesh K. Vodrahalli describes a highdensity ceramic BGA package. This patent purportedly addresses the thermal expansion mismatch problem between the BGA package and the host PCB by using specially composed ceramic materials. The CTE of typical PCB materials is between 13 ppm/C° and 20 ppm/C°. However, commonly used aluminum oxide ceramics have a CTE around 7 ppm/C°. Vodrahalli presents a multilayer ceramic BGA package which has a CTE between 10-15 ppm/C°, which is close to the CTE of host PCBs. The process steps for that method start with formation of the green tape with raw material powder. After forming the green tape, the circuit lines and via holes are printed using a thick film process. Then, the whole circuitry is sintered (or fired) to make it rigid. Finally, surfaces are smoothed and metal traces are plated. Sintering can be done at high or low temperatures depending on the types of ceramic materials used. However, one of the disadvantages of this method is that it uses a thick film method to form the metal traces on the circuit, which has relatively low resolution compared to thin film and photolithographic techniques. Another disadvantage is that during sintering, the circuitry shrinks. Although the percentage of this shrinkage can be controlled precisely, the amount of shrinkage across the circuitry may not be constant if some parts of the circuitry contain more metals than other parts. In other words, the circuit may distort after the sintering process.
U.S. Pat. No. 5,832,598 to Norman L. Greenman et al. describes a method of making a microwave circuit package. This patent addresses the difficulty in the sintering process of ceramics resulting from non-uniform shrinkage across the circuit as described above, and tries to solve it by using a single layer pre-sintered ceramic substrate and employing thin-film techniques. It also demonstrates an encapsulation technique suitable for millimeter-wave circuits using an appropriate lid structure without using any kind of plastic molding for encapsulation. The disadvantage of Greenman's method is, as the package size becomes larger, the thermal expansion mismatch starts to be an issue. Although pre-sintered ceramic materials provide a good solution from an electrical performance point of view for small packages at millimeter-wave frequencies, the thermal expansion mismatch problem makes them very difficult to use for larger package sizes.
Greenman et al. also describes a method to compensate the RF signal transitions for optimum electrical performance. It is known that the BGA transitions result in significant series inductance that deteriorates the reflection loss of the circuit at high frequencies. The series inductance of BGA transitions is usually compensated by placing ground vias around the signal via hole to increase the shunt capacitance to ground. This structure can be viewed as a quasi-coaxial structure along the BGA transition. Since the characteristic impedance of a loss-free TEM transmission line is given by the equation Z0=√{square root over (L/C)}, increased series inductance can be compensated by increasing the shunt capacitance to keep the Z0 same (to some extent). Then, by adjusting the spacing between the center via and the ground vias as well as the via diameters (changing the shunt capacitance), the impedance of the transition is brought closer to 50 Ohms in order to match it to the rest of the circuitry. Note that the permittivity of the substrate materials also affects this impedance but this value is usually fixed beforehand.
U.S. Pat. No. 6,215,377 to Daniel F. Douriet describes a low-cost wideband RF port structure for a microwave circuit. This patent describes how to design broadband RF transitions for millimeter-wave IC packages though it does not address the actual packaging problems in detail. Douriet uses coplanar waveguides for his RF BGA transition. Although for small numbers of transitions the coplanar waveguides can be used, for high density RF connections using coplanar waveguides is not preferred because it requires additional ground traces along the signal conductor, using up more substrate area. Besides, coplanar waveguides are prone to excitation of higher order modes which can be an issue for electrically long transmission lines. Another difficulty related to use of coplanar waveguides is that for the same impedance values and substrate heights, the width of the center conductor of the coplanar waveguides is narrow. This increases the metallization losses and makes manufacturing more difficult.
U.S. Pat. No. 5,424,693 to Chao-Hui Lin describes a surface mountable microwave IC package suitable for high frequency operation. However, in this patent, a thick-film technique is employed and due to the aforementioned difficulties, it is not suitable for large, high-density BGA millimeter-wave packages.
An improved BGA package is desired.